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Programming Interface for Bus Master IDE Controller Revision 1.0
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk, c' U0 s3 ^; H4 z6 S
controller that directly moves data between IDE devices and main memory. By performing the IDE data* _- _0 V, T% x \% T
transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
* d/ z" T: Y0 |3 M8 ~+ Mand improves system performance in multitasking environments.
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Until this specification is ratified, it is solely( E$ q6 _ W8 @! X& z% H1 `
owned and maintained by:/ y- q% D+ D2 U( |* m% N- j: J) x
Brad Hosler, Intel Corporation
; @+ y; L5 ^* J4 n( s/ Nbwh@salem.intel.com (please comment using email)" W0 S& I, o$ r; U0 p' b* S$ c
503-696-8431 |
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发表于 2010-7-14 14:53:56
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