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Programming Interface for Bus Master IDE Controller Revision 1.02 p7 j; A) W' V* u, Z7 k; b
1994/05/160 g. H( ~% e" m# i
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk
% c2 e* A7 _3 a; i1 \6 Wcontroller that directly moves data between IDE devices and main memory. By performing the IDE data
5 |0 r4 K: {. wtransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
9 r, J2 e( M$ ]! P) }and improves system performance in multitasking environments.
, O9 Q) Y5 e4 s: A$ i2 b3 x% x9 K) z
Until this specification is ratified, it is solely
4 i$ |: p# U5 G) I% {owned and maintained by:0 C C3 a1 ] j% ?5 V3 ]
Brad Hosler, Intel Corporation
2 ^3 C d- T7 Lbwh@salem.intel.com (please comment using email)2 e9 [8 Y6 j# i+ C, P( ~* o$ }
503-696-8431 |
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